Abstract. This paper describes an experimental investigation of interactive techniques for cross-language information access. The task was to answer factual questions from a large ...
Daqing He, Jianqiang Wang, Jun Luo, Douglas W. Oar...
Abstract -- This paper describes the use of a hierarchical design representation standard, CHDStd, as part of the architecture of the Chip Hierarchical Design System (CHDS). Detail...
S. Grout, G. Ledenbach, R. G. Bushroe, P. Fisher, ...
Schema mappings are logical assertions that specify the relationships between a source and a target schema in a declarative way. The specification of such mappings is a fundamenta...
Networks-on-chip (NoC) are a scalable interconnect solution for systems on chip and are rapidly becoming reality. Monitoring is a key enabler for debugging or performance analysis...
Calin Ciordas, Andreas Hansson, Kees Goossens, Twa...
In this paper, an internal design model called FunState (functions driven by state machines) is presented that enables the representation of different types of system components a...