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» Large Event Traces in Parallel Performance Analysis
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IPPS
1999
IEEE
15 years 5 months ago
Relaxing Causal Constraints in PDES
One of the major overheads that prohibits the wide spread deployment of parallel discrete event simulation PDES is the need to synchronize the distributed processes in the simulat...
Narayanan V. Thondugulam, Dhananjai Madhava Rao, R...
VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
16 years 1 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
INFOCOM
2010
IEEE
14 years 12 months ago
BGP Churn Evolution: a Perspective from the Core
—The scalability limitations of BGP have been a major concern in the networking community lately. An important issue in this respect is the rate of routing updates (churn) that B...
Ahmed Elmokashfi, Amund Kvalbein, Constantine Dovr...
IPPS
2009
IEEE
15 years 8 months ago
Dynamic high-level scripting in parallel applications
Parallel applications typically run in batch mode, sometimes after long waits in a scheduler queue. In some situations, it would be desirable to interactively add new functionalit...
Filippo Gioachin, Laxmikant V. Kalé
HPCA
2011
IEEE
14 years 5 months ago
Essential roles of exploiting internal parallelism of flash memory based solid state drives in high-speed data processing
Flash memory based solid state drives (SSDs) have shown a great potential to change storage infrastructure fundamentally through their high performance and low power. Most recent ...
Feng Chen, Rubao Lee, Xiaodong Zhang