656 search results - page 16 / 132 » Large-Graph Layout Algorithms at Work: An Experimental Study |
64
Voted
COLING
2010
14 years 4 months ago
2010
This paper presents a comparative study on two key problems existing in extractive summarization: the ranking problem and the selection problem. To this end, we presented a system...
ISVC
2010
Springer
14 years 7 months ago
2010
Springer
We introduce Indented Pixel Tree Plots (IPTPs): a novel pixel-based visualization technique for depicting large hierarchies. It is inspired by the visual metaphor of indented outli...
ISPD
2004
ACM
15 years 3 months ago
2004
ACM
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
FIMI
2003
14 years 11 months ago
2003
We present a performance study of the MAFIA algorithm for mining maximal frequent itemsets from a transactional database. In a thorough experimental analysis, we isolate the effec...
ISPD
2010
ACM
15 years 4 months ago
2010
ACM
In the nanometer IC design, dummy fill is often performed to improve layout pattern uniformity and the post-CMP quality. However, filling dummies might greatly increase intercon...