87 search results - page 16 / 18 » Latency Minimization for Synchronous Data Flow Graphs |
127
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WDAG
1995
Springer
15 years 7 months ago
1995
Springer
Larchant-RDOSS is a distributed shared memory that persists on reliable storage across process lifetimes. Memory management is automatic: including consistent caching of data and ...
128
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IPPS
1996
IEEE
15 years 7 months ago
1996
IEEE
A new VLSI architecture for real-time pipeline FFT processor is proposed. A hardware oriented radix-22 algorithm is derived by integrating a twiddle factor decomposition technique ...
124
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IISWC
2008
IEEE
15 years 10 months ago
2008
IEEE
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
163
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SASP
2008
IEEE
15 years 10 months ago
2008
IEEE
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
173
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IEEEPACT
2002
IEEE
15 years 8 months ago
2002
IEEE
Many modern embedded processors (esp. DSPs) support partitioned memory banks (also called X-Y memory or dual bank memory) along with parallel load/store instructions to achieve co...