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MICRO
2010
IEEE
202views Hardware» more  MICRO 2010»
14 years 6 months ago
Hardware Support for Relaxed Concurrency Control in Transactional Memory
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
Utku Aydonat, Tarek S. Abdelrahman
OSDI
1996
ACM
15 years 1 months ago
Automatic Compiler-Inserted I/O Prefetching for Out-of-Core Applications
Current operating systems offer poor performance when a numeric application's working set does not fit in main memory. As a result, programmers who wish to solve "out-of...
Todd C. Mowry, Angela K. Demke, Orran Krieger
WOWMOM
2005
ACM
173views Multimedia» more  WOWMOM 2005»
15 years 5 months ago
Design and Evaluation of iMesh: An Infrastructure-Mode Wireless Mesh Network
Abstract— Wireless mesh networks are multihop networks of wireless routers typically used for wireless coverage over a large community. Applications include community-scale peer-...
Vishnu Navda, Anand Kashyap, Samir R. Das
SIGMOD
2009
ACM
157views Database» more  SIGMOD 2009»
15 years 12 months ago
Asynchronous view maintenance for VLSD databases
The query models of the recent generation of very large scale distributed (VLSD) shared-nothing data storage systems, including our own PNUTS and others (e.g. BigTable, Dynamo, Ca...
Parag Agrawal, Adam Silberstein, Brian F. Cooper, ...
MICRO
2008
IEEE
72views Hardware» more  MICRO 2008»
15 years 6 months ago
Low-power, high-performance analog neural branch prediction
Shrinking transistor sizes and a trend toward low-power processors have caused increased leakage, high per-device variation and a larger number of hard and soft errors. Maintainin...
Renée St. Amant, Daniel A. Jiménez, ...