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JSAC
2007
81views more  JSAC 2007»
14 years 11 months ago
Packet Prioritization in Multihop Latency Aware Scheduling for Delay Constrained Communication
— This paper addresses the problem of optimizing the packet transmission schedule in a multihop wireless network with end-to-end delay constraints. The emphasis is to determine t...
Ben Liang, Min Dong
DAC
2005
ACM
16 years 19 days ago
User-perceived latency driven voltage scaling for interactive applications
Power has become a critical concern for battery-driven computing systems, on which many applications that are run are interactive. System-level voltage scaling techniques, such as...
Le Yan, Lin Zhong, Niraj K. Jha
ICCD
2006
IEEE
137views Hardware» more  ICCD 2006»
15 years 8 months ago
Implementation and Evaluation of On-Chip Network Architectures
— Driven by the need for higher bandwidth and complexity reduction, off-chip interconnect has evolved from proprietary busses to networked architectures. A similar evolution is o...
Paul Gratz, Changkyu Kim, Robert G. McDonald, Step...
FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
15 years 4 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi
DSD
2009
IEEE
144views Hardware» more  DSD 2009»
15 years 6 months ago
Composable Resource Sharing Based on Latency-Rate Servers
Abstract—Verification of application requirements is becoming a bottleneck in system-on-chip design, as the number of applications grows. Traditionally, the verification comple...
Benny Akesson, Andreas Hansson, Kees Goossens