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IPPS
2000
IEEE
15 years 4 months ago
Micro-Architectures of High Performance, Multi-User System Area Network Interface Cards
This paper examines two Network Interface Card microarchitectures that support low latency, high bandwidth userlevel message passing in multi-user environments. The two are at dif...
Boon Seong Ang, Derek Chiou, Larry Rudolph, Arvind
ISCA
2003
IEEE
212views Hardware» more  ISCA 2003»
15 years 5 months ago
A Performance Analysis of PIM, Stream Processing, and Tiled Processing on Memory-Intensive Signal Processing Kernels
Trends in microprocessors of increasing die size and clock speed and decreasing feature sizes have fueled rapidly increasing performance. However, the limited improvements in DRAM...
Jinwoo Suh, Eun-Gyu Kim, Stephen P. Crago, Lakshmi...
CANPC
1999
Springer
15 years 4 months ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi
MSS
2007
IEEE
76views Hardware» more  MSS 2007»
15 years 6 months ago
Implementing and Evaluating Security Controls for an Object-Based Storage System
This paper presents the implementation and performance evaluation of a real, secure object-based storage system compliant to the TIO OSD standard. In contrast to previous work, ou...
Zhongying Niu, Ke Zhou, Dan Feng, Hong Jiang, Fran...
IJHPCN
2006
106views more  IJHPCN 2006»
14 years 11 months ago
Performance evaluation of the Sun Fire Link SMP clusters
As symmetric multiprocessors become commonplace, the interconnection networks and the communication system software in clusters of multiprocessors become critical to achieving high...
Ying Qian, Ahmad Afsahi, Nathan R. Fredrickson, Re...