This paper examines two Network Interface Card microarchitectures that support low latency, high bandwidth userlevel message passing in multi-user environments. The two are at dif...
Boon Seong Ang, Derek Chiou, Larry Rudolph, Arvind
Trends in microprocessors of increasing die size and clock speed and decreasing feature sizes have fueled rapidly increasing performance. However, the limited improvements in DRAM...
Jinwoo Suh, Eun-Gyu Kim, Stephen P. Crago, Lakshmi...
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
This paper presents the implementation and performance evaluation of a real, secure object-based storage system compliant to the TIO OSD standard. In contrast to previous work, ou...
Zhongying Niu, Ke Zhou, Dan Feng, Hong Jiang, Fran...
As symmetric multiprocessors become commonplace, the interconnection networks and the communication system software in clusters of multiprocessors become critical to achieving high...
Ying Qian, Ahmad Afsahi, Nathan R. Fredrickson, Re...