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131
Voted
HPCA
2009
IEEE
16 years 4 months ago
Design and implementation of software-managed caches for multicores with local memory
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
Sangmin Seo, Jaejin Lee, Zehra Sura
EMSOFT
2009
Springer
15 years 10 months ago
Implementing time-predictable load and store operations
Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages of scratchpads include reduced energy consumption in comparison to a cache and a...
Jack Whitham, Neil C. Audsley
150
Voted
COMPUTING
2004
204views more  COMPUTING 2004»
15 years 3 months ago
Image Registration by a Regularized Gradient Flow. A Streaming Implementation in DX9 Graphics Hardware
The presented image registration method uses a regularized gradient flow to correlate the intensities in two images. Thereby, an energy functional is successively minimized by des...
Robert Strzodka, Marc Droske, Martin Rumpf
171
Voted
INFOCOM
1998
IEEE
15 years 7 months ago
Implementing Distributed Packet Fair Queueing in a Scalable Switch Architecture
To support the Internet's explosive growth and expansion into a true integrated services network, there is a need for cost-effective switching technologies that can simultaneo...
Donpaul C. Stephens, Hui Zhang
131
Voted
MSWIM
2004
ACM
15 years 9 months ago
IEEE 802.11 rate adaptation: a practical approach
Today, three different physical (PHY) layers for the IEEE 802.11 WLAN are available (802.11a/b/g); they all provide multi-rate capabilities. To achieve a high performance under v...
Mathieu Lacage, Mohammad Hossein Manshaei, Thierry...