636 search results - page 44 / 128 » Latency Performance of SOAP Implementations |
ASPLOS
1991
ACM
15 years 3 months ago
1991
ACM
Caches enhance the performance of multiprocessors by reducing network trac and average memory access latency. However, cache-based systems must address the problem of cache coher...
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SIGCOMM
2012
ACM
13 years 2 months ago
2012
ACM
Today’s data centers face extreme challenges in providing low latency. However, fair sharing, a principle commonly adopted in current congestion control protocols, is far from o...
DATE
2008
IEEE
15 years 6 months ago
2008
IEEE
This paper describes an implementation language and synthesis system for automatically generating latency insensitive synchronous digital designs. These designs decouple behaviora...
ICTAI
2005
IEEE
15 years 5 months ago
2005
IEEE
The immanent existence of system latency greatly affects the control behavior of a closed-loop system. In order to reduce the influence induced by latency, this paper proposes a ...
DAC
2004
ACM
15 years 5 months ago
2004
ACM
The Pentium® 4 processor architecture uses a 2x frequency core clock[1] to implement low latency integer ops. Low Voltage Swing logic circuits implemented in 90nm technology[2] m...