Sciweavers

636 search results - page 55 / 128
» Latency Performance of SOAP Implementations
Sort
View
WMPI
2004
ACM
15 years 5 months ago
A low cost, multithreaded processing-in-memory system
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...
Jay B. Brockman, Shyamkumar Thoziyoor, Shannon K. ...
ERSA
2006
89views Hardware» more  ERSA 2006»
15 years 1 months ago
Multi-Mode Operator for SHA-2 Hash Functions
We propose an improved implementation of the SHA-2 hash family to include a multi-mode of operation with minimal latency and hardware requirements over the entire operator. The mul...
Ryan Glabb, Laurent Imbert, Graham A. Jullien, Arn...
PDPTA
2003
15 years 1 months ago
Comparing Multiported Cache Schemes
The performance of the data memory hierarchy is extremely important in current and near future high performance superscalar microprocessors. To address the memory gap, computer de...
Smaïl Niar, Lieven Eeckhout, Koenraad De Boss...
IPPS
1998
IEEE
15 years 4 months ago
PULC: ParaStation User-Level Communication. Design and Overview
PULC is a user-level communication library for workstation clusters. PULC provides a multi-user, multi-programming communication library for user level communication on top of high...
Joachim M. Blum, Thomas M. Warschko, Walter F. Tic...
WAN
1998
Springer
15 years 4 months ago
ParaStation User Level Communication
PULC is a user-level communication library for workstation clusters. PULC provides a multi-user, multi-programming communication library for user level communication on top of high...
Joachim M. Blum, Thomas M. Warschko, Walter F. Tic...