636 search results - page 82 / 128 » Latency Performance of SOAP Implementations |
108
click to vote
MICRO
2005
IEEE
15 years 5 months ago
2005
IEEE
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
105
click to vote
VLSID
2007
IEEE
16 years 7 days ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
188
click to vote
HPCA
2007
IEEE
15 years 6 months ago
2007
IEEE
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
110
click to vote
ICS
2004
Tsinghua U.
15 years 5 months ago
2004
Tsinghua U.
Cache hierarchies have been traditionally designed for usage by a single application, thread or core. As multi-threaded (MT) and multi-core (CMP) platform architectures emerge and...
ANCS
2009
ACM
14 years 9 months ago
2009
ACM
In this paper we introduce the Range Trie, a new multiway tree data structure for address lookup. Each Range Trie node maps to an address range [Na, Nb) and performs multiple comp...