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» Layer Supported Models of Logic Programs
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DAC
2004
ACM
15 years 10 months ago
ORACLE: optimization with recourse of analog circuits including layout extraction
Long design cycles due to the inability to predict silicon realities is a well-known problem that plagues analog/RF integrated circuit product development. As this problem worsens...
Yang Xu, Lawrence T. Pileggi, Stephen P. Boyd
MICRO
2003
IEEE
258views Hardware» more  MICRO 2003»
15 years 2 months ago
LLVA: A Low-level Virtual Instruction Set Architecture
A virtual instruction set architecture (V-ISA) implemented via a processor-specific software translation layer can provide great flexibility to processor designers. Recent examp...
Vikram S. Adve, Chris Lattner, Michael Brukman, An...
VRCAI
2004
ACM
15 years 2 months ago
Explorative construction of virtual worlds: an interactive kernel approach
Despite steady research advances in many aspects of virtual reality, building and testing virtual worlds remains to be a very difficult process. Most virtual environments are stil...
Jinseok Seo, Gerard Jounghyun Kim
ICCAD
1994
IEEE
117views Hardware» more  ICCAD 1994»
15 years 1 months ago
Optimal latch mapping and retiming within a tree
We propose a technology mapping algorithm that takes existing structural technology-mapping algorithms based on dynamic programming [1,3,4] and extends them to retime pipelined cir...
Joel Grodstein, Eric Lehman, Heather Harkness, Her...
OOPSLA
2005
Springer
15 years 3 months ago
MDAbench: a tool for customized benchmark generation using MDA
Designing component-based application that meets performance requirements remains a challenging problem, and usually requires a prototype to be constructed to benchmark performanc...
Liming Zhu, Yan Liu, Ian Gorton, Ngoc Bao Bui