1965 search results - page 165 / 393 » Layered Design Visualisation |
DATE
2007
IEEE
15 years 9 months ago
2007
IEEE
3D integration of multiple active layers into a single chip is a viable technique that greatly reduces the length of global wires by providing vertical connections between layers....
143
Voted
IAT
2007
IEEE
15 years 9 months ago
2007
IEEE
The paper presents security platform based on agents as an efficient and robust solution for high-performance intrusion detection system designed for deployment on highspeed netw...
108
Voted
ICCCN
2007
IEEE
15 years 9 months ago
2007
IEEE
—an interplay between mobile devices and static sensor nodes is envisioned in the near future. This will enable a heterogeneous design space that can offset the stringent resourc...
101
Voted
ASPDAC
2006
ACM
15 years 8 months ago
2006
ACM
—As the VLSI manufacturing technology advances into the deep sub-micron(DSM) era, the mask cost can reach one or two million dollars. Multiple project wafers (MPW) which put di...
140
Voted
PPPJ
2006
ACM
15 years 8 months ago
2006
ACM
This paper is about business process management (BPM) and business activity monitoring (BAM) using event processing. We will show why the management of business processes is impor...