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DAC
2009
ACM
16 years 2 months ago
Double patterning lithography friendly detailed routing with redundant via consideration
In double patterning lithography (DPL), coloring conflict and stitch minimization are the two main challenges. Post layout decomposition algorithm [1] [2]may not be enough to achi...
Kun Yuan, Katrina Lu, David Z. Pan
ICCAD
2004
IEEE
128views Hardware» more  ICCAD 2004»
15 years 10 months ago
Power estimation for cycle-accurate functional descriptions of hardware
— Cycle-accurate functional descriptions (CAFDs) are being widely adopted in integrated circuit (IC) design flows. Power estimation can potentially benefit from the inherent in...
Lin Zhong, Srivaths Ravi, Anand Raghunathan, Niraj...
SENSYS
2009
ACM
15 years 8 months ago
Achieving range-free localization beyond connectivity
Wireless sensor networks have been proposed for many location-dependent applications. In such applications, the requirement of low system cost prohibits many range-based methods f...
Ziguo Zhong, Tian He
ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
15 years 8 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
ASPDAC
2009
ACM
139views Hardware» more  ASPDAC 2009»
15 years 8 months ago
Hardware-dependent software synthesis for many-core embedded systems
Abstract— This paper presents synthesis of Hardware Dependent Software (HdS) for multicore and many-core designs using Embedded System Environment (ESE). ESE is a tool set, devel...
Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho...