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ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
15 years 10 months ago
Formal model of data reuse analysis for hierarchical memory organizations
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
PAM
2010
Springer
15 years 8 months ago
Yes, We LEDBAT: Playing with the New BitTorrent Congestion Control Algorithm
Since December 2008, the official BitTorrent client is using a new congestion-control protocol for data transfer, implemented at the application layer and built over UDP at the tr...
Dario Rossi, Claudio Testa, Silvio Valenti
110
Voted
DATE
2009
IEEE
150views Hardware» more  DATE 2009»
15 years 8 months ago
A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs
—Interconnect structures significantly contribute to the delay, power consumption, and silicon area of modern reconfigurable architectures. The demand for higher clock frequencie...
Kostas Siozios, Vasilis F. Pavlidis, Dimitrios Sou...
ICC
2009
IEEE
130views Communications» more  ICC 2009»
15 years 8 months ago
Flexible Single Sign-On for SIP: Bridging the Identity Chasm
—Identity federation is a key requirement for today’s distributed services. This technology allows managed sharing of users’ identity information between identity providers (...
Pin Nie, Juha-Matti Tapio, Sasu Tarkoma, Jani Heik...
143
Voted
ICNP
2009
IEEE
15 years 8 months ago
Accurate Clock Synchronization for IEEE 802.11-Based Multi-Hop Wireless Networks
—Clock synchronization is an essential building block for many control mechanisms used in wireless networks, including frequency hopping, power management, and packet scheduling....
Jui-Hao Chiang, Tzi-cker Chiueh