Sciweavers

1965 search results - page 91 / 393
» Layered Design Visualisation
Sort
View
ANNPR
2006
Springer
15 years 3 months ago
A Convolutional Neural Network Tolerant of Synaptic Faults for Low-Power Analog Hardware
Abstract. Recently, the authors described a training method for a convolutional neural network of threshold neurons. Hidden layers are trained by by clustering, in a feed-forward m...
Johannes Fieres, Karlheinz Meier, Johannes Schemme...
INFOCOM
2011
IEEE
14 years 5 months ago
VIRO: A scalable, robust and namespace independent virtual Id routing for future networks
—In this paper we propose VIRO — a novel, virtual identifier (Id) routing paradigm for future networks. The objective is three-fold. First, VIRO directly addresses the challen...
Sourabh Jain, Yingying Chen, Zhi-Li Zhang
ICSE
2000
IEEE-ACM
15 years 5 months ago
Component design of retargetable program analysis tools that reuse intermediate representations
Interactive program analysis tools are often tailored to one particular representation of programs, making adaptation to a new language costly. One way to ease adaptability is to ...
James Hayes, William G. Griswold, Stuart Moskovics
EVOW
2004
Springer
15 years 7 months ago
Aesthetic Video Filter Evolution in an Interactive Real-Time Framework
A data-flow network-based interactive evolutionary design framework is presented which will provide a testbed for the development and exploration of a diverse range of visual arti...
Matthew Lewis
DATE
2009
IEEE
105views Hardware» more  DATE 2009»
15 years 8 months ago
UMTS MPSoC design evaluation using a system level design framework
Rapid design space exploration with accurate models is necessary to improve designer productivity at the electronic system level. We describe how to use a new event-based design f...
Douglas Densmore, Alena Simalatsar, Abhijit Davare...