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VLSID
2006
IEEE
136views VLSI» more  VLSID 2006»
16 years 5 days ago
Improved Data Compression for Serial Interconnected Network on Chip through Unused Significant Bit Removal
Serial links in network on chip provide advantages in terms of reduced wiring area, reduced switch complexity and power. However, serial links offer lower bandwidth in comparison ...
Simon Ogg, Bashir M. Al-Hashimi
IJES
2008
128views more  IJES 2008»
14 years 11 months ago
On-chip implementation of multiprocessor networks and switch fabrics
: On-chipimplementationofmultiprocessorsystemsneedstoplanarisetheinterconnect networks onto the silicon floorplan. Compared with traditional ASIC/SoC architectures, Multiprocessor ...
Terry Tao Ye, Giovanni De Micheli
CR
2001
151views Education» more  CR 2001»
15 years 1 months ago
Layers of Meaning: Disentangling Subject Access Interoperability
ACT n are ge. subject access ieved. In order to facilitate subject access interoperability a mechanism must be built that allows the different controlled vocabularies to communicat...
Joseph T. Tennis
RTSS
2008
IEEE
15 years 6 months ago
Priority Assignment for Real-Time Wormhole Communication in On-Chip Networks
—Wormhole switching with fixed priority preemption has been proposed as a possible solution for real-time on-chip communication. However, none of current priority assignment pol...
Zheng Shi, Alan Burns
ICPADS
2008
IEEE
15 years 6 months ago
Quarc: A Novel Network-On-Chip Architecture
This paper introduces the Quarc NoC, a novel NoC architecture inspired by the Spidergon NoC [16]. The Quarc scheme significantly outperforms the Spidergon NoC through balancing t...
Mahmoud Moadeli, Wim Vanderbauwhede, Ali Shahrabi