248 search results - page 14 / 50 » Layered Switching for Networks on Chip |
IMC
2009
ACM
15 years 6 months ago
2009
ACM
Many enterprise, campus, and data-center networks have complex layer-2 virtual LANs (“VLANs”) below the IP layer. The interaction between layer-2 and IP topologies in these VL...
INFOCOM
2000
IEEE
15 years 4 months ago
2000
IEEE
Abstract— In this paper, we share our experience in designing and building a content based switch which we call L5. In addition to the layer 2-3-4 information available in the pa...
130
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ISCA
2006
IEEE
14 years 11 months ago
2006
IEEE
Packet-based on-chip networks are increasingly being adopted in complex System-on-Chip (SoC) designs supporting numerous homogeneous and heterogeneous functional blocks. These Net...
109
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ISVLSI
2008
IEEE
15 years 6 months ago
2008
IEEE
The evolution of deep submicron technologies allows the development of increasingly complex Systems on a Chip (SoC). However, this evolution is rendering less viable some well-est...
100
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DSD
2003
IEEE
15 years 5 months ago
2003
IEEE
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...