248 search results - page 44 / 50 » Layered Switching for Networks on Chip |
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CODES
2009
IEEE
15 years 6 months ago
2009
IEEE
A growing number of applications, with diverse requirements, are integrated on the same System on Chip (SoC) in the form of hardware and software Intellectual Property (IP). The d...
MICRO
2006
IEEE
15 years 5 months ago
2006
IEEE
Growing on-chip wire delays will cause many future microarchitectures to be distributed, in which hardware resources within a single processor become nodes on one or more switched...
88
Voted
ASPDAC
2006
ACM
15 years 5 months ago
2006
ACM
- The performance of Network-on-Chip (NoC) largely depends on the underlying routing techniques, which have two constituencies: output selection and input selection. Previous resea...
ICS
2005
Tsinghua U.
15 years 5 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
104
Voted
ISPD
2004
ACM
15 years 5 months ago
2004
ACM
High performance integrated circuits are now reaching the 100-plus watt regime, and power delivery and power grid signal integrity have become critical. Analyzing the performance ...