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» Layered Switching for Networks on Chip
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DATE
2009
IEEE
183views Hardware» more  DATE 2009»
15 years 8 months ago
SunFloor 3D: A tool for Networks On Chip topology synthesis for 3D systems on chips
Three-dimensional integrated circuits are a promising approach to address the integration challenges faced by current Systems on Chips (SoCs). Designing an efficient Network on C...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
15 years 8 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
TCAD
2010
160views more  TCAD 2010»
14 years 8 months ago
SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips
Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient netwo...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...
ICC
2008
IEEE
123views Communications» more  ICC 2008»
15 years 8 months ago
Impairment-Aware Manycasting over Optical Burst-Switched Networks
— In this paper we discuss the effect of physical impairments on manycasting service over the optical burstswitched (OBS) networks. Signal quality degradation in manycast network...
Balagangadhar G. Bathula, Vinod Vokkarane, Rajesh ...
ISCAS
2006
IEEE
109views Hardware» more  ISCAS 2006»
15 years 7 months ago
Network-on-chip quality-of-service through multiprotocol label switching
Abstract— Providing Quality-of-Service (QoS) in networks-onchip (NoCs) will be an important consideration for the complex multiprocessor chips of the future. In this paper, we di...
Manho Kim, Daewook Kim, Gerald E. Sobelman