Sciweavers

373 search results - page 18 / 75
» Learning Arithmetic Circuits
Sort
View
97
Voted
ISMVL
2010
IEEE
174views Hardware» more  ISMVL 2010»
15 years 5 months ago
Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits
—Fixed-point multiplication architectures are designed and evaluated using a set of logic cells based on a radix-4, quaternary number system. The library of logic circuits is bas...
Satyendra R. Datla, Mitchell A. Thornton
142
Voted
COCO
1997
Springer
144views Algorithms» more  COCO 1997»
15 years 4 months ago
Polynomial Vicinity Circuits and Nonlinear Lower Bounds
We study families of Boolean circuits with the property that the number of gates at distance t fanning into or out of any given gate in a circuit is bounded above by a polynomial ...
Kenneth W. Regan
95
Voted
COCO
2006
Springer
88views Algorithms» more  COCO 2006»
15 years 2 months ago
Polynomial Identity Testing for Depth 3 Circuits
We study the identity testing problem for depth 3 arithmetic circuits ( circuit). We give the first deterministic polynomial time identity test for circuits with bounded top fanin...
Neeraj Kayal, Nitin Saxena
UAI
2008
15 years 1 months ago
Sensitivity analysis in decision circuits
Decision circuits have been developed to perform efficient evaluation of influence diagrams [Bhattacharjya and Shachter, 2007], building on the advances in arithmetic circuits for...
Debarun Bhattacharjya, Ross D. Shachter
GECCO
2000
Springer
182views Optimization» more  GECCO 2000»
15 years 4 months ago
A Novel Evolvable Hardware Framework for the Evolution of High Performance Digital Circuits
This paper presents a novel evolvable hardware framework for the automated design of digital circuits for high performance applications. The technique evolves circuits correspondi...
Ben I. Hounsell, Tughrul Arslan