—This paper focuses on routing tree construction problem and its influence on the performance of utilizing centralized scheduling in IEEE 802.16 mesh networks. We apply three rou...
This paper presents the hardware architecture of DynaCORE, a dynamically reconfigurable system-on-chip for network applications. DynaCORE is an application specific coprocessor ...
Roman Koch, Thilo Pionteck, Carsten Albrecht, Erik...
TCP(α,β) protocols trade the congestion window increase value α for the decrease ratio β , to generate smoother traffic patterns and to maintain a friendly behavior. In this p...
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
— In this paper, a distributive non-cooperative game is proposed to perform sub-channel assignment, adaptive modulation, and power control for multi-cell multi-user Orthogonal Fr...