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DFT
2005
IEEE
103views VLSI» more  DFT 2005»
15 years 9 months ago
Methodologies and Algorithms for Testing Switch-Based NoC Interconnects
In this paper, we present two novel methodologies for testing the interconnect fabrics of network-on-chip (NoC) based chips. Both use the concept of recursive testing, with differ...
Cristian Grecu, Partha Pratim Pande, Baosheng Wang...
DSD
2002
IEEE
103views Hardware» more  DSD 2002»
15 years 8 months ago
On the Fundamental Design Gap in Terabit per Second Packet Switching
We discuss the gap we experience in an industrial design path of high-speed packet switches. As bandwidth demand exceeds progress in CMOS technology, system architects are forced ...
M. Verhappen, P. H. A. van der Putten, Jeroen Voet...
ISCAS
2006
IEEE
109views Hardware» more  ISCAS 2006»
15 years 9 months ago
Network-on-chip quality-of-service through multiprotocol label switching
Abstract— Providing Quality-of-Service (QoS) in networks-onchip (NoCs) will be an important consideration for the complex multiprocessor chips of the future. In this paper, we di...
Manho Kim, Daewook Kim, Gerald E. Sobelman
IWPC
2002
IEEE
15 years 8 months ago
The Role of Concepts in Program Comprehension
The paper presents an overview of the role of concepts in program comprehension. It discusses concept location, in which the implementation of a specific concept is located in the...
Václav Rajlich, Norman Wilde
CORR
2010
Springer
122views Education» more  CORR 2010»
15 years 1 months ago
Manipulating Multistage Interconnection Networks Using Fundamental Arrangements
Optimizing interconnection networks is a prime object in switching schemes. In this work the authors present a novel approach for obtaining a required channel arrangement in a mul...
Eran Gur, Zeev Zalevsky