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121
Voted
ISCA
2009
IEEE
150views Hardware» more  ISCA 2009»
15 years 9 months ago
Stream chaining: exploiting multiple levels of correlation in data prefetching
Data prefetching has long been an important technique to amortize the effects of the memory wall, and is likely to remain so in the current era of multi-core systems. Most prefetc...
Pedro Diaz, Marcelo Cintra
ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
15 years 9 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
124
Voted
ISCA
2009
IEEE
136views Hardware» more  ISCA 2009»
15 years 9 months ago
Architectural core salvaging in a multi-core processor for hard-error tolerance
The incidence of hard errors in CPUs is a challenge for future multicore designs due to increasing total core area. Even if the location and nature of hard errors are known a prio...
Michael D. Powell, Arijit Biswas, Shantanu Gupta, ...
113
Voted
MICRO
2009
IEEE
99views Hardware» more  MICRO 2009»
15 years 9 months ago
Low-cost router microarchitecture for on-chip networks
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
John Kim
148
Voted
MICRO
2009
IEEE
507views Hardware» more  MICRO 2009»
15 years 9 months ago
Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling
Phase Change Memory (PCM) is an emerging memory technology that can increase main memory capacity in a cost-effective and power-efficient manner. However, PCM cells can endure on...
Moinuddin K. Qureshi, John Karidis, Michele France...
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