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EURODAC
1990
IEEE
92views VHDL» more  EURODAC 1990»
15 years 2 months ago
Accelerated test pattern generation by cone-oriented circuit partitioning
In this paper an efficient cone oriented circuit partitioning method is presented, which significantly speeds up automatic test pattern generation for combinational circuits. The ...
Torsten Grüning, Udo Mahlstedt, Wilfried Daeh...
GECCO
2007
Springer
156views Optimization» more  GECCO 2007»
15 years 4 months ago
Hierarchical genetic programming based on test input subsets
Crucial to the more widespread use of evolutionary computation techniques is the ability to scale up to handle complex problems. In the field of genetic programming, a number of d...
David Jackson
ISCAS
1999
IEEE
105views Hardware» more  ISCAS 1999»
15 years 2 months ago
Configuration self-test in FPGA-based reconfigurable systems
An FPGA-based reconfigurable system may contain boards of FPGAs which are reconfigured for different applications and must work correctly. This paper presents a novel approach for...
W. Quddus, Abhijit Jas, Nur A. Touba
TIT
2002
125views more  TIT 2002»
14 years 10 months ago
Optimal bi-level quantization of i.i.d. sensor observations for binary hypothesis testing
We consider the problem of binary hypothesis testing using binary decisions from independent and identically distributed (i.i.d). sensors. Identical likelihood-ratio quantizers wit...
Qian Zhang, Pramod K. Varshney, Richard D. Wesel
RANDOM
2001
Springer
15 years 2 months ago
Proclaiming Dictators and Juntas or Testing Boolean Formulae
We consider the problem of determining whether a given function ¢ £ ¤¥ ¦ §¨©  ¤¥ ¦ §¨ belongs to a certain class of Boolean functions  or whether it is far from the...
Michal Parnas, Dana Ron, Alex Samorodnitsky