Thermal problems and limitations on interlayer via densities are important design constraints on three-dimensional integrated circuits (3D ICs), and need to be considered during g...
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for VLSI design. This paper,...
A sensitivity analysis of resonant H-tree clock distribution networks is presented in this paper for a TSMC 0.18 μm CMOS technology. The analysis focuses on the effect of the dri...
Resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resulting in minimum c...
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully ...
Alejandro Czutro, Ilia Polian, Matthew D. T. Lewis...