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» Lectures on VLSI and Integrated Circuit Design
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GLVLSI
2005
IEEE
132views VLSI» more  GLVLSI 2005»
15 years 3 months ago
Interconnect capacitance extraction for system LCD circuits
This paper discusses interconnect capacitance extraction for system LCD circuits, where coupling capacitance is much significant since a ground plane locates far away unlike LSI ...
Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimot...
GLVLSI
2009
IEEE
113views VLSI» more  GLVLSI 2009»
15 years 1 months ago
Reducing parity generation latency through input value aware circuits
1 Soft errors caused by cosmic particles and radiation emitted by the packaging are an important problem in contemporary microprocessors. Parity bits are used to detect single bit ...
Yusuf Osmanlioglu, Y. Onur Koçberber, Oguz ...
GLVLSI
2007
IEEE
140views VLSI» more  GLVLSI 2007»
15 years 3 months ago
Structured and tuned array generation (STAG) for high-performance random logic
Regularly structured design techniques can combat complexity on a variety of fronts. We present the Structured and Tuned Array Generation (STAG) design methodology, which provides...
Matthew M. Ziegler, Gary S. Ditlow, Stephen V. Kos...
GLVLSI
2009
IEEE
172views VLSI» more  GLVLSI 2009»
15 years 1 months ago
Contact merging algorithm for efficient substrate noise analysis in large scale circuits
A methodology is proposed to efficiently estimate the substrate noise generated by large scale aggressor circuits. Small spatial voltage differences within the ground distribution...
Emre Salman, Renatas Jakushokas, Eby G. Friedman, ...
IWANN
2005
Springer
15 years 3 months ago
CMOL CrossNets as Pattern Classifiers
This presentation has two goals: (i) to review the recently suggested concept of bio-inspired CrossNet architectures for future hybrid CMOL VLSI circuits and (ii) to present new re...
Jung Hoon Lee, Konstantin Likharev