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» Lectures on VLSI and Integrated Circuit Design
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DAC
2009
ACM
15 years 6 months ago
Information hiding for trusted system design
For a computing system to be trusted, it is equally important to verify that the system performs no more and no less functionalities than desired. Traditional testing and verifica...
Junjun Gu, Gang Qu, Qiang Zhou
GECCO
2004
Springer
15 years 5 months ago
Designing Multiplicative General Parameter Filters Using Adaptive Genetic Algorithms
Multiplicative general parameter (MGP) approach to finite impulse response (FIR) filtering introduces a novel way to realize cost effective adaptive filters in compact very large s...
Jarno Martikainen, Seppo J. Ovaska
GLVLSI
2006
IEEE
113views VLSI» more  GLVLSI 2006»
15 years 5 months ago
Statistical gate delay calculation with crosstalk alignment consideration
We study gate delay variation caused by crosstalk aggressor alignment, i.e., difference of signal arrival times in coupled neighboring interconnects. This effect is as significan...
Andrew B. Kahng, Bao Liu, Xu Xu
DAC
2005
ACM
15 years 1 months ago
Response compaction with any number of unknowns using a new LFSR architecture
This paper presents a new test response compaction technique with any number of unknown logic values (X’s) in the test response bits. The technique leverages an X-tolerant respo...
Erik H. Volkerink, Subhasish Mitra
GLVLSI
2003
IEEE
173views VLSI» more  GLVLSI 2003»
15 years 5 months ago
40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
Michael I. Fuller, James P. Mabry, John A. Hossack...