239 search results - page 36 / 48 » Lectures on VLSI and Integrated Circuit Design |
69
Voted
GLVLSI
2010
IEEE
15 years 2 months ago
2010
IEEE
Clock skew variations adversely affect timing margins, limiting performance, reducing yield, and may also lead to functional faults. Non-tree clock distribution networks, such as ...
CSUR
2006
14 years 9 months ago
2006
resents a perspective on existing NoC research. We define the following abstractions: system, network adapter, network, and link to explain and structure the fundamental concepts. ...
ICCAD
2006
IEEE
15 years 6 months ago
2006
IEEE
We present the first efficient approach to global routing that takes spacing-dependent costs into account and provably finds a near-optimum solution including these costs. We sh...
ASPDAC
2000
ACM
15 years 1 months ago
2000
ACM
After a detailed analysis and discussion of two important characteristics of today’s battery cells (i.e., their current-capacity and current-voltage curves), this paper descr...
80
Voted
TCAD
2002
14 years 9 months ago
2002
This paper describes an application of a Constructive Genetic Algorithm (CGA) to the Gate Matrix Layout Problem (GMLP). The GMLP happens in very large scale integration (VLSI) desi...