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BMCBI
2004
156views more  BMCBI 2004»
15 years 2 months ago
DIALIGN P: Fast pair-wise and multiple sequence alignment using parallel processors
Background: Parallel computing is frequently used to speed up computationally expensive tasks in Bioinformatics. Results: Herein, a parallel version of the multi-alignment program...
Martin Schmollinger, Kay Nieselt, Michael Kaufmann...
NOCS
2009
IEEE
15 years 9 months ago
Silicon-photonic clos networks for global on-chip communication
Future manycore processors will require energyefficient, high-throughput on-chip networks. Siliconphotonics is a promising new interconnect technology which offers lower power, h...
Ajay Joshi, Christopher Batten, Yong-Jin Kwon, Sco...
ACSC
2007
IEEE
15 years 9 months ago
Compact Layout of Layered Trees
The standard layered drawing convention for trees in which the vertical placement of a node is given by its level in the tree and each node is centered between its children can le...
Kim Marriott, Peter Sbarski
ISCAS
2006
IEEE
93views Hardware» more  ISCAS 2006»
15 years 9 months ago
A low-power clock frequency multiplier
A low-power output feedback controlled frequency synthesizer. Our proposed circuit can be used for low-power multiplier is proposed for Delay Locked Loop (DLL) based application an...
Md. Ibrahim Faisal, Magdy A. Bayoumi, Peiyi Zhao
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FORMATS
2004
Springer
15 years 8 months ago
Bounded Model Checking for Region Automata
For successful software verification, model checkers must be capable of handling a large number of program variables. Traditional, BDD-based model checking is deficient in this reg...
Fang Yu, Bow-Yaw Wang, Yao-Wen Huang