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ASYNC
1998
IEEE
122views Hardware» more  ASYNC 1998»
15 years 7 months ago
A Fast Asynchronous Huffman Decoder for Compressed-Code Embedded Processors
This paper presents the architecture and design of a high-performance asynchronous Huffman decoder for compressed-code embedded processors. In such processors, embedded programs a...
Martin Benes, Steven M. Nowick, Andrew Wolfe
IWAN
1999
Springer
15 years 7 months ago
Policy Specification for Programmable Networks
There is a need to be able to program network components to adapt to application requirements for quality of service, specialised application dependent routing, to increase effici...
Morris Sloman, Emil Lupu
ASPDAC
2007
ACM
93views Hardware» more  ASPDAC 2007»
15 years 7 months ago
Flow-Through-Queue based Power Management for Gigabit Ethernet Controller
- This paper presents a novel architectural mechanism and a power management structure for the design of an energy-efficient Gigabit Ethernet controller. Key characteristics of suc...
Hwisung Jung, Andy Hwang, Massoud Pedram
ESEM
2007
ACM
15 years 7 months ago
Effort Prediction in Iterative Software Development Processes -- Incremental Versus Global Prediction Models
Estimation of development effort without imposing overhead on the project and the development team is of paramount importance for any software company. This study proposes a new e...
Pekka Abrahamsson, Raimund Moser, Witold Pedrycz, ...
CASES
2006
ACM
15 years 6 months ago
Power efficient branch prediction through early identification of branch addresses
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
Chengmo Yang, Alex Orailoglu