Sciweavers

1494 search results - page 200 / 299
» Less Extreme Programming
Sort
View
123
Voted
MICRO
2010
IEEE
111views Hardware» more  MICRO 2010»
14 years 9 months ago
Putting Faulty Cores to Work
Since the non-cache parts of a core are less regular, compared to on-chip caches, tolerating manufacturing defects in the processing core is a more challenging problem. Due to the ...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
TCAD
2010
110views more  TCAD 2010»
14 years 9 months ago
Dose Map and Placement Co-Optimization for Improved Timing Yield and Leakage Power
Abstract--In sub-100 nm CMOS processes, delay and leakage power reduction continue to be among the most critical design concerns. We propose to exploit the recent availability of f...
Kwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Ha...
128
Voted
ASPLOS
2012
ACM
13 years 10 months ago
ELI: bare-metal performance for I/O virtualization
Direct device assignment enhances the performance of guest virtual machines by allowing them to communicate with I/O devices without host involvement. But even with device assignm...
Abel Gordon, Nadav Amit, Nadav Har'El, Muli Ben-Ye...
162
Voted
JMLR
2012
13 years 5 months ago
Sparse Higher-Order Principal Components Analysis
Traditional tensor decompositions such as the CANDECOMP / PARAFAC (CP) and Tucker decompositions yield higher-order principal components that have been used to understand tensor d...
Genevera Allen
158
Voted
JMLR
2012
13 years 5 months ago
Age-Layered Expectation Maximization for Parameter Learning in Bayesian Networks
The expectation maximization (EM) algorithm is a popular algorithm for parameter estimation in models with hidden variables. However, the algorithm has several non-trivial limitat...
Avneesh Singh Saluja, Priya Krishnan Sundararajan,...