1494 search results - page 232 / 299 » Less Extreme Programming |
128
click to vote
ISCA
2000
IEEE
15 years 6 months ago
2000
IEEE
For many applications, branch mispredictions and cache misses limit a processor’s performance to a level well below its peak instruction throughput. A small fraction of static i...
138
click to vote
ICCAD
1999
IEEE
15 years 6 months ago
1999
IEEE
We consider the problem of finding an optimal clock schedule, i.e. optimal arrival times for clock signals at latches of a VLSI chip. We describe a general model which includes al...
107
click to vote
IPPS
1999
IEEE
15 years 6 months ago
1999
IEEE
In this paper we present a paradigm to express streams and its implementation. Streams are a convenient mechanism to communicate multimedia data, for example video or audio, betwe...
112
Voted
IPPS
1999
IEEE
15 years 6 months ago
1999
IEEE
PM-PVM is a portable implementation of PVM designed to work on SMP architectures supporting multithreading. PM-PVM portability is achieved through the implementation of the PVM fu...
104
click to vote
RTSS
1999
IEEE
15 years 6 months ago
1999
IEEE
Previous timing analysis methods have assumed that the worst-case instruction execution time necessarily corresponds to the worst-case behavior. We show that this assumption is wr...