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CP
1997
Springer
15 years 6 months ago
Ordering Constraints over Feature Trees
Feature trees have been used to accommodate records in constraint programming and record like structures in computational linguistics. Feature trees model records, and feature cons...
Martin Müller, Joachim Niehren, Andreas Podel...
ICPP
1996
IEEE
15 years 6 months ago
A Timestamp-based Selective Invalidation Scheme for Multiprocessor Cache Coherence
- Among all software cache coherence strategaes, the ones that are based on the concept of tamestamps show the greatest potentaal an terms of cache performance. The early tamestamp...
Xin Yuan, Rami G. Melhem, Rajiv Gupta
MICRO
1994
IEEE
85views Hardware» more  MICRO 1994»
15 years 6 months ago
A high-performance microarchitecture with hardware-programmable functional units
This paper explores a novel way to incorporate hardware-programmable resources into a processor microarchitecture to improve the performance of general-purpose applications. Throu...
Rahul Razdan, Michael D. Smith
DAC
1994
ACM
15 years 6 months ago
Routing in a New 2-Dimensional FPGA/FPIC Routing Architecture
- This paper studies the routing problem for a new Field-Programmable Gate Array (FPGA) and Field-Programmable Interconnect Chip (FPIC) routing architecture which improves upon the...
Yachyang Sun, C. L. Liu
ESORICS
1994
Springer
15 years 6 months ago
The ESPRIT Project CAFE - High Security Digital Payment Systems
CAFE ("Conditional Access for Europe") is an ongoing project in the European Community's ESPRIT program. The goal of CAFE is to develop innovative systems for condit...
Jean-Paul Boly, Antoon Bosselaers, Ronald Cramer, ...