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MICRO
2000
IEEE
72views Hardware» more  MICRO 2000»
14 years 9 months ago
PipeRench implementation of the instruction path coprocessor
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...
Yuan C. Chou, Pazhani Pillai, Herman Schmit, John ...
99
Voted
IPM
2007
156views more  IPM 2007»
14 years 9 months ago
Integration of an XML electronic dictionary with linguistic tools for natural language processing
This study proposes the codification of lexical information in electronic dictionaries, in accordance with a generic and extendable XML scheme model, and its conjunction with lin...
Octavio Santana Suárez, Francisco J. Carrer...
SC
2009
ACM
15 years 4 months ago
Enabling high-fidelity neutron transport simulations on petascale architectures
The UNIC code is being developed as part of the DOE’s Nuclear Energy Advanced Modeling and Simulation (NEAMS) program. UNIC is an unstructured, deterministic neutron transport c...
Dinesh K. Kaushik, Micheal Smith, Allan Wollaber, ...
EUROPAR
2010
Springer
14 years 9 months ago
Optimized On-Chip-Pipelined Mergesort on the Cell/B.E
Abstract. Limited bandwidth to off-chip main memory is a performance bottleneck in chip multiprocessors for streaming computations, such as Cell/B.E., and this will become even mor...
Rikard Hultén, Christoph W. Kessler, Jö...
SOUPS
2005
ACM
15 years 3 months ago
Stopping spyware at the gate: a user study of privacy, notice and spyware
Spyware is a significant problem for most computer users. The term “spyware” loosely describes a new class of computer software. This type of software may track user activitie...
Nathaniel Good, Rachna Dhamija, Jens Grossklags, D...