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ICCAD
2003
IEEE
115views Hardware» more  ICCAD 2003»
16 years 27 days ago
Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda
ICCAD
2002
IEEE
107views Hardware» more  ICCAD 2002»
16 years 27 days ago
Theoretical and practical validation of combined BEM/FEM substrate resistance modeling
In mixed-signal designs, substrate noise originating from the digital part can seriously influence the functionality of the analog part. As such, accurately modeling the properti...
Eelco Schrik, Patrick Dewilde, N. P. van der Meijs
SOFSEM
2010
Springer
16 years 27 days ago
Source Code Rejuvenation Is Not Refactoring
Programmers rely on programming idioms, design patterns, and workaround techniques to make up for missing programming language support. Evolving languages often address frequently ...
Peter Pirkelbauer, Damian Dechev, Bjarne Stroustru...
CVPR
2010
IEEE
16 years 6 days ago
Fast and Robust Object Segmentation with the Integral Linear Classifier
We propose an efficient method, built on the popular Bag of Features approach, that obtains robust multiclass pixellevel object segmentation of an image in less than 500ms, with...
David Aldavert, Arnau Ramisa, Ricardo Toledo, Ramo...
ISPASS
2010
IEEE
15 years 11 months ago
Performance-effective operation below Vcc-min
Continuous circuit miniaturization and increased process variability point to a future with diminishing returns from dynamic voltage scaling. Operation below Vcc-min has been prop...
Nikolas Ladas, Yiannakis Sazeides, Veerle Desmet