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» Level Shifter Design for Low Power Applications
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CASES
2004
ACM
15 years 3 months ago
Balancing design options with Sherpa
Application specific processors offer the potential of rapidly designed logic specifically constructed to meet the performance and area demands of the task at hand. Recently, t...
Timothy Sherwood, Mark Oskin, Brad Calder
FM
2003
Springer
136views Formal Methods» more  FM 2003»
15 years 3 months ago
Improving Safety Assessment of Complex Systems: An Industrial Case Study
The complexity of embedded controllers is steadily increasing. This trend, stimulated by the continuous improvement of the computational power of hardware, demands for a correspond...
Marco Bozzano, Antonella Cavallo, Massimo Cifaldi,...
CHES
2009
Springer
150views Cryptology» more  CHES 2009»
15 years 4 months ago
A Design Flow and Evaluation Framework for DPA-Resistant Instruction Set Extensions
Power-based side channel attacks are a significant security risk, especially for embedded applications. To improve the security of such devices, protected logic styles have been p...
Francesco Regazzoni, Alessandro Cevrero, Fran&cced...
ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
15 years 1 months ago
Mixed-clock issue queue design for energy aware, high-performance cores
- Globally-Asynchronous, Locally-Synchronous (GALS) design style has started to gain interest recently as a possible solution to the increased design complexity, power and thermal ...
Venkata Syam P. Rapaka, Emil Talpes, Diana Marcule...
CASES
2006
ACM
15 years 1 months ago
Incremental elaboration for run-time reconfigurable hardware designs
We present a new technique for compiling run-time reconfigurable hardware designs. Run-time reconfigurable embedded systems can deliver promising benefits over implementations in ...
Arran Derbyshire, Tobias Becker, Wayne Luk