Sciweavers

915 search results - page 10 / 183
» Level Shifter Design for Low Power Applications
Sort
View
63
Voted
GLVLSI
1998
IEEE
134views VLSI» more  GLVLSI 1998»
15 years 1 months ago
Low-Power Design of Finite Field Multipliers for Wireless Applications
Amr G. Wassal, M. Anwarul Hasan, Mohamed I. Elmasr...
85
Voted
ISLPED
2003
ACM
149views Hardware» more  ISLPED 2003»
15 years 2 months ago
Elements of low power design for integrated systems
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...
Sung-Mo Kang
ISSS
2000
IEEE
127views Hardware» more  ISSS 2000»
15 years 2 months ago
Lower Bound Estimation for Low Power High-Level Synthesis
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
Lars Kruse, Eike Schmidt, Gerd Jochens, Ansgar Sta...
ISQED
2009
IEEE
106views Hardware» more  ISQED 2009»
15 years 4 months ago
Design and application of multimodal power gating structures
- Designing a power-gating structure with high performance in the active mode and low leakage and short wakeup time during standby mode is an important and challenging task. This p...
Ehsan Pakbaznia, Massoud Pedram
ICCAD
1995
IEEE
135views Hardware» more  ICCAD 1995»
15 years 1 months ago
An iterative improvement algorithm for low power data path synthesis
We address the problem of minimizing power consumption in behavioral synthesis of data-dominated circuits. The complex nature of power as a cost function implies that the effects ...
Anand Raghunathan, Niraj K. Jha