Sciweavers

915 search results - page 110 / 183
» Level Shifter Design for Low Power Applications
Sort
View
FPL
2008
Springer
125views Hardware» more  FPL 2008»
14 years 11 months ago
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks
FPGA devices have witnessed popularity in their use for the rapid prototyping of biological Spiking Neural Network (SNNs) applications, as they offer the key requirement of reconf...
Jim Harkin, Fearghal Morgan, Steve Hall, Piotr Dud...
DATE
2009
IEEE
194views Hardware» more  DATE 2009»
15 years 4 months ago
A UML frontend for IP-XACT-based IP management
—IP-XACT is a well accepted standard for the exchange of IP components at Electronic System and Register Transfer Level. Still, the creation and manipulation of these description...
Tim Schattkowsky, Tao Xie, Wolfgang Mueller
ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
14 years 11 months ago
On multiple-voltage high-level synthesis using algorithmic transformations
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
Hsueh-Chih Yang, Lan-Rong Dung
GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
15 years 3 months ago
A Multi-objective Approach to Configuring Embedded System Architectures
Portable embedded systems are being driven by consumer demands to be thermally efficient, perform faster, and have longer battery life. To design such a system, various hardware un...
James Northern III, Michael A. Shanblatt
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
15 years 2 months ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...