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» Level Shifter Design for Low Power Applications
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DSD
2005
IEEE
116views Hardware» more  DSD 2005»
15 years 3 months ago
Optimization of a Bus-based Test Data Transportation Mechanism in System-on-Chip
The increasing amount of test data needed to test SOC (System-on-Chip) entails efficient design of the TAM (test access mechanism), which is used to transport test data inside the...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
WH
2010
185views Healthcare» more  WH 2010»
14 years 4 months ago
The Berkeley Tricorder: wireless health monitoring
The advancement of precision micropower amplifiers, microcontrollers, and MEMs devices have allowed for a paradigm shift from traditionally large and costly health monitoring equi...
Reza Naima, John F. Canny
GLVLSI
2008
IEEE
140views VLSI» more  GLVLSI 2008»
15 years 4 months ago
A table-based method for single-pass cache optimization
Due to the large contribution of the memory subsystem to total system power, the memory subsystem is highly amenable to customization for reduced power/energy and/or improved perf...
Pablo Viana, Ann Gordon-Ross, Edna Barros, Frank V...
ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
15 years 1 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...
ICHIM
2001
113views more  ICHIM 2001»
14 years 11 months ago
A Content-Centered Methodology for Authoring 3D Interactive Worlds for Cultural Heritage
The application of 3D visualization technologies to cultural heritage has deeply evolved along years, shifting from the role of an ancillary technical solution to the dignity of a...
Augusto Celentano, Fabio Pittarello