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ICA3PP
2010
Springer
15 years 2 months ago
Accelerating Euler Equations Numerical Solver on Graphics Processing Units
Abstract. Finite volume numerical methods have been widely studied, implemented and parallelized on multiprocessor systems or on clusters. Modern graphics processing units (GPU) pr...
Pierre Kestener, Frédéric Chât...
DATE
2008
IEEE
97views Hardware» more  DATE 2008»
14 years 11 months ago
Energy Efficient and High Speed On-Chip Ternary Bus
We propose two crosstalk reducing coding schemes using ternary busses. In addition to low power consumption and reduced delay, our schemes offer other advantages over binary codin...
Chunjie Duan, Sunil P. Khatri
CDES
2006
106views Hardware» more  CDES 2006»
14 years 11 months ago
Reducing Memory References for FFT Calculation
Fast Fourier Transform (FFT) is one of the most widely used algorithms in digital signal processing. It is used in many signal processing and communication applications. many of t...
Ayman Elnaggar, Mokhtar Aboelaze
GLVLSI
2005
IEEE
147views VLSI» more  GLVLSI 2005»
15 years 3 months ago
1-V 7-mW dual-band fast-locked frequency synthesizer
This paper presents a fully integrated 1-V, dual band, fastlocked frequency synthesizer for IEEE 802.11 a/b/g WLAN applications. It can synthesize frequencies in the range of 2.4 ...
Vikas Sharma, Chien-Liang Chen, Chung-Ping Chen
NETWORK
2006
302views more  NETWORK 2006»
14 years 9 months ago
Node clustering in wireless sensor networks: recent developments and deployment challenges
The large-scale deployment of wireless sensor networks (WSNs) and the need for data aggregation necessitate efficient organization of the network topology for the purpose of balan...
Ossama Younis, Marwan Krunz, Srinivasan Ramasubram...