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» Level Shifter Design for Low Power Applications
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ICMCS
2006
IEEE
204views Multimedia» more  ICMCS 2006»
15 years 5 months ago
Low Power Entropy Coding Hardware Design for H.264/AVC Baseline Profile Encoder
Low power hardware design for entropy coding of H.264/AVC baseline profile encoder is urgent for the increasing mobile applications. However, previous works are poor in the power...
Chuan-Yung Tsai, Tung-Chien Chen, Liang-Gee Chen
ISLPED
2000
ACM
111views Hardware» more  ISLPED 2000»
15 years 4 months ago
Low power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels
In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Variou...
Khurram Muhammad, Robert B. Staszewski, Poras T. B...
VLSID
2003
IEEE
115views VLSI» more  VLSID 2003»
16 years 2 days ago
An Adaptive Supply-Voltage Scheme for Low Power Self-Timed CMOS Digital Design
This paper combines an adaptive supply-voltage scheme with self-timed CMOS digital design, to achieve low power performance. The supply-voltage automatically tracks the input data...
W. Kuang, J. S. Yuan
VLSISP
2010
148views more  VLSISP 2010»
14 years 10 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
15 years 5 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah