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» Level Shifter Design for Low Power Applications
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CODES
2003
IEEE
15 years 3 months ago
Security wrappers and power analysis for SoC technologies
Future wireless internet enabled devices will be increasingly powerful supporting many more applications including one of the most crucial, security. Although SoCs offer more resi...
Catherine H. Gebotys, Y. Zhang
DATE
2010
IEEE
160views Hardware» more  DATE 2010»
15 years 2 months ago
Soft error-aware design optimization of low power and time-constrained embedded systems
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu...
ICCD
2001
IEEE
110views Hardware» more  ICCD 2001»
15 years 6 months ago
Low-Energy DSP Code Generation Using a Genetic Algorithm
This paper deals with low-energy code generation for a highly optimized digital signal processor designed for mobile communication applications. We present a genetic algorithm bas...
Markus Lorenz, Rainer Leupers, Peter Marwedel, Tho...
ICCD
2002
IEEE
115views Hardware» more  ICCD 2002»
15 years 6 months ago
Low-Power, High-Speed CMOS VLSI Design
Ubiquitous computing is a next generation information technology where computers and communications will be scaled further, merged together, and materialized in consumer applicati...
Tadahiro Kuroda
ISLPED
1997
ACM
85views Hardware» more  ISLPED 1997»
15 years 1 months ago
Low power motion estimation design using adaptive pixel truncation
Power consumption is very critical for portable video applications such as portable video-phone. Motion estimation in the video encoder requires huge amount of computation and hen...
Zhong-Li He, Kai-Keung Chan, Chi-Ying Tsui, Ming L...