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» Level Shifter Design for Low Power Applications
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ACSAC
2008
IEEE
15 years 4 months ago
Defending Against Attacks on Main Memory Persistence
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
William Enck, Kevin R. B. Butler, Thomas Richardso...
RTSS
2007
IEEE
15 years 3 months ago
Energy-Aware Scheduling of Real-Time Tasks in Wireless Networked Embedded Systems
Recent technological advances have opened up several distributed real-time applications involving battery-driven embedded devices with local processing and wireless communication ...
G. Sudha Anil Kumar, G. Manimaran
FPGA
2007
ACM
124views FPGA» more  FPGA 2007»
15 years 3 months ago
A practical FPGA-based framework for novel CMP research
Chip-multiprocessors are quickly gaining momentum in all segments of computing. However, the practical success of CMPs strongly depends on addressing the difficulty of multithread...
Sewook Wee, Jared Casper, Njuguna Njoroge, Yuriy T...
ISCA
2006
IEEE
169views Hardware» more  ISCA 2006»
15 years 3 months ago
Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches
Level one cache normally resides on a processor’s critical path, which determines the clock frequency. Directmapped caches exhibit fast access time but poor hit rates compared w...
Chuanjun Zhang
80
Voted
IUI
2005
ACM
15 years 3 months ago
Building intelligent shopping assistants using individual consumer models
This paper describes an Intelligent Shopping Assistant designed for a shopping cart mounted tablet PC that enables individual interactions with customers. We use machine learning ...
Chad M. Cumby, Andrew E. Fano, Rayid Ghani, Marko ...