915 search results - page 19 / 183 » Level Shifter Design for Low Power Applications |
VLSID
2002
IEEE
15 years 10 months ago
2002
IEEE
Interconnection networks in Systems-On-Chip begin to have a non-negligible impact on the power consumption of a whole system. This is because of increasing inter-wire capacitances...
123
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CSREAESA
2003
14 years 11 months ago
2003
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
This paper describes an optimization technique able to optimize a complete wireless receiver architecture in a reasonable amount of time. The optimizer alternates between spice le...
104
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DATE
2009
IEEE
15 years 1 months ago
2009
IEEE
—Power management at any abstraction level is a key issue for many mobile multimedia and embedded applications. In this paper a design workflow to generate system-level power mo...
92
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HIPEAC
2009
Springer
15 years 4 months ago
2009
Springer
In this article, we present a parallel implementation of a 1024 point Fast Fourier Transform (FFT) operating with a subthreshold supply voltage, which is below the voltage that tur...