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    » Level Shifter Design for Low Power Applications
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    ISLPED
    2005
    ACM
    147views Hardware» more  ISLPED 2005»
    System level power and performance modeling of GALS point-to-point communication interfaces
    15 years 3 months ago
    System level power and performance modeling of GALS point-to-point communication interfaces
    Download  www.ece.cmu.edu
    Due to difficulties in distributing a single global clock signal over increasingly large chip areas, a globally asynchronous, locally synchronous design is considered a promising ...
    Koushik Niyogi, Diana Marculescu
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    DFT
    2004
    IEEE
    93views VLSI» more  DFT 2004»
    First Level Hold: A Novel Low-Overhead Delay Fault Testing Technique
    15 years 1 months ago
    First Level Hold: A Novel Low-Overhead Delay Fault Testing Technique
    Download  online.sfsu.edu
    This paper presents a novel delay fault testing technique, which can be used as an alternative to the enhanced scan based delay fault testing, with significantly less design overh...
    Swarup Bhunia, Hamid Mahmoodi-Meimand, Arijit Rayc...
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    TVLSI
    1998
    83views more  TVLSI 1998»
    Low overhead fault-tolerant FPGA systems
    14 years 9 months ago
    Low overhead fault-tolerant FPGA systems
    Download  www.cs.ucla.edu
    — Fault-tolerance is an important system metric for many operating environments, from automotive to space exploration. The conventional technique for improving system reliability...
    John Lach, William H. Mangione-Smith, Miodrag Potk...
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    ISLPED
    2007
    ACM
    94views Hardware» more  ISLPED 2007»
    Design of an efficient power delivery network in an soc to enable dynamic power management
    14 years 11 months ago
    Design of an efficient power delivery network in an soc to enable dynamic power management
    Download  atrak.usc.edu
    Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabl...
    Behnam Amelifard, Massoud Pedram
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    ASPDAC
    2001
    ACM
    100views Hardware» more  ASPDAC 2001»
    Low power implementation of a turbo-decoder on programmable architectures
    15 years 1 months ago
    Low power implementation of a turbo-decoder on programmable architectures
    Download  ems.eit.uni-kl.de
    Low Power is an extremely important issue for future mobile radio systems. Channel decoders are essential building blocks of base-band signal processing units in mobile terminal ar...
    Frank Gilbert, Alexander Worm, Norbert Wehn
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