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» Level Shifter Design for Low Power Applications
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DAC
2007
ACM
15 years 10 months ago
High Performance and Low Power Electronics on Flexible Substrate
We propose a design and optimization methodology for high performance and ultra low power digital applications on flexible substrate using Low Temperature Polycrystalline Silicon ...
Jing Li, Kunhyuk Kang, Aditya Bansal, Kaushik Roy
CSREAESA
2003
14 years 11 months ago
Low-Power Dynamic Scheduling in Heterogeneous Systems
: This paper develops a matching and scheduling algorithm that accounts for both the execution time and the power consumption of the application. The power consumption of different...
Saumya Uppaluri, Baback A. Izadi, Damu Radhakrishn...
ISLPED
2005
ACM
68views Hardware» more  ISLPED 2005»
15 years 3 months ago
Low power SRAM techniques for handheld products
SRAM leakage constitutes a significant portion of the standby power budget of modern SoC products for handheld applications such as PDA and cellular phones. NMOS and PMOS reverse ...
Rabiul Islam, Adam Brand, Dave Lippincott
ICCAD
2002
IEEE
113views Hardware» more  ICCAD 2002»
15 years 6 months ago
Interconnect-aware high-level synthesis for low power
Abstract—Interconnects (wires, buffers, clock distribution networks, multiplexers and busses) consume a significant fraction of total circuit power. In this work, we demonstrat...
Lin Zhong, Niraj K. Jha
IJCSA
2008
100views more  IJCSA 2008»
14 years 9 months ago
A Smart Architecture for Low-Level Image Computing
This paper presents a comparison relating two different vision system architectures. The first one involves a smart sensor including analog processors allowing on-chip image proce...
A. Elouardi, Samir Bouaziz, Antoine Dupret, Lionel...