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» Level Shifter Design for Low Power Applications
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ICPPW
2002
IEEE
15 years 2 months ago
A Statistical Approach for the Analysis of the Relation Between Low-Level Performance Information, the Code, and the Environment
This paper presents a methodology for aiding a scientific programmer to evaluate the performance of parallel programs on advanced architectures. It applies well-defined design o...
Nayda G. Santiago, Diane T. Rover, Domingo Rodr&ia...
HOTOS
2009
IEEE
15 years 1 months ago
Mobility Changes Everything in Low-Power Wireless Sensornets
The system and network architecture for static sensornets is largely solved today with many stable commercial solutions now available and standardization efforts underway at the I...
Prabal Dutta, David E. Culler
GLVLSI
2003
IEEE
239views VLSI» more  GLVLSI 2003»
15 years 3 months ago
CMOS flash analog-to-digital converter for high speed and low voltage applications
A CMOS flash analog-to-digital converter (ADC) designed for high speed and low voltage is presented. Using the Threshold Inverter Quantization (TIQ) comparator technique, a flas...
Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi
HPCC
2007
Springer
15 years 3 months ago
A Low-Power Globally Synchronous Locally Asynchronous FFT Processor
Abstract. Low-power design became crucial with the widespread use of the embedded systems, where a small battery has to last for a long period. The embedded processors need to ef...
Yong Li, Zhiying Wang, Jian Ruan, Kui Dai
CODES
2007
IEEE
15 years 4 months ago
A low power VLIW processor generation method by means of extracting non-redundant activation conditions
This paper proposes a low power VLIW processor generation method by automatically extracting non-redundant activation conditions of pipeline registers for clock gating. It is impo...
Hirofumi Iwato, Keishi Sakanushi, Yoshinori Takeuc...