915 search results - page 46 / 183 » Level Shifter Design for Low Power Applications |
GLVLSI
2003
IEEE
15 years 3 months ago
2003
IEEE
In this paper, we address the problem of the efficient exploration of the architectural design space for parameterized systems. Since the design space is multi-objective, our aim ...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
: In this research, a fixed-point multimedia co-processor is designed and tested into an ARM-10 based mobile graphics processor for portable 2-D and 3-D multimedia applications. Th...
TVLSI
2002
14 years 9 months ago
2002
This paper compares four previously published static dual-edge-triggered flip-flops (DETFFs) with a proposed design for their performance, power dissipation, and low-voltage low-po...
ISCAS
2006
IEEE
15 years 3 months ago
2006
IEEE
— We consider the design of the MAC layer for low power, low data-rate, impulse-radio ultra-wide band (IRUWB) networks. In such networks, the primary concern is energy consumptio...
ISLPED
2003
ACM
15 years 3 months ago
2003
ACM
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...