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» Level Shifter Design for Low Power Applications
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APCSAC
2003
IEEE
15 years 3 months ago
Mapping Applications to a Coarse Grain Reconfigurable System
This paper introduces a method which can be used to map applications written in a high level source language program, like C, to a coarse grain reconfigurable architecture, MONTIU...
Yuanqing Guo, Gerard J. M. Smit, Hajo Broersma, Mi...
NDSS
2007
IEEE
15 years 4 months ago
Generic Application-Level Protocol Analyzer and its Language
Application-level protocol analyzers are important components in tools such as intrusion detection systems, firewalls, and network monitors. Currently, protocol analyzers are wri...
Nikita Borisov, David Brumley, Helen J. Wang, John...
GLVLSI
2007
IEEE
172views VLSI» more  GLVLSI 2007»
15 years 4 months ago
The effect of temperature on cache size tuning for low energy embedded systems
Energy consumption is a major concern in embedded computing systems. Several studies have shown that cache memories account for about 40% or more of the total energy consumed in t...
Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki ...
FDL
2003
IEEE
15 years 3 months ago
Dynamic Power Management of an AMBA-based Platform in SystemC
With System on Chip low power constraints becoming increasingly important, emphasis is moving to architectural level, optimum memory organisation and system run time management. T...
Massimo Conti, Marco Caldari, Simone Orcioni
ISLPED
2005
ACM
150views Hardware» more  ISLPED 2005»
15 years 3 months ago
Fast configurable-cache tuning with a unified second-level cache
Tuning a configurable cache subsystem to an application can greatly reduce memory hierarchy energy consumption. Previous tuning methods use a level one configurable cache only, or...
Ann Gordon-Ross, Frank Vahid, Nikil D. Dutt